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81 ghz to 86 ghz, 1 w e-band power amplifier with power detector data sheet admv7810 rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2018 analog devices, inc. all rights reserved. technical support www.analog.com features gain: 20 db typical output power for 1 db compression: 28 dbm typical saturated output power: 29 dbm typical output third-order intercept: 33 dbm typical input return loss: 12 db typical output return loss: 20 db typical dc supply: 4 v at 800 ma no external matching required die size: 2.999 mm 3.799 mm 0.05 mm applications e-band communication systems high capacity wireless backhaul radio systems test and measurement general description the admv7810 is an integrated e-band gallium arsenide (gaas), pseudomorphic, high electron mobility transfer (phemt), mono- lithic microwave integrated circuit (mmic), medium power amplifier with a temperature compensated on-chip power detector that operates from 81 ghz to 86 ghz. the admv7810 provides 20 db of gain, 28 dbm of output power at 1 db compression, and 29 dbm of saturated output power at 18% power added efficiency from a 4 v power supply. the admv7810 exhibits excellent linearity and is optimized for e-band communications and high capacity wireless backhaul radio systems. the amplifier configura- tion and high gain make the device an excellent candidate for last stage signal amplification before the antenna. all data is taken with the chip in a 50 test fixture connected via a 3 mil wide 0.5 mil thick 7 mil long ribbon on each port. the admv7810 is available in a 40-pad bare die (chip) and operates over the ?55c to +85c temperature range. functional block diagram 4567891011121314151617 1819 3 2 1 rfin 20 21 22 rfout 23242526 2728293031323334353637383940 vgg1a vdd1a vgg2a vdd2a vgg3a vdd3a vgg4a vdd4a vref vdet vdd4b vgg4b vdd3b vgg3b vdd2b vgg2b vdd1b vgg1b admv7810 16409-001 figure 1.
admv7810 data sheet rev. 0 | page 2 of 17 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 4 ? thermal resistance ...................................................................... 4 ? esd caution .................................................................................. 4 ? pin configuration and function descriptions ............................. 5 ? interface schematics..................................................................... 6 ? typical performance characteristics ............................................. 7 ? theory of operation ...................................................................... 13 ? typical application circuit ........................................................... 14 ? assembly diagram ..................................................................... 15 ? mounting and bonding techniques for millimeterwave gaas mmics ............................................................................................. 16 ? handling precautions ................................................................ 16 ? mounting ..................................................................................... 16 ? wire bonding .............................................................................. 16 ? outline dimensions ....................................................................... 17 ? ordering guide .......................................................................... 17 ? revision history 3/2018revision 0: initial version
data sheet admv7810 rev. 0 | page 3 of 17 specifications t a = 25c, vddxa and vddxb = 4 v, i dd = 800 ma, unless otherwise noted. table 1. parameter symbol min typ max unit operating conditions frequency range 81 86 ghz performance gain 18 20 db gain variation over temperature 0.02 db/c output power for 1 db compression op1db 26 28 dbm saturated output power p sat 29 dbm output third-order intercept at maximum gain 1 oip3 33 dbm power added efficiency pae 18 % input return loss 12 db output return loss 20 db power supply total drain current 2 i dd 800 ma 1 data taken at output power (p out ) = 14 dbm per tone, 1 mhz spacing. 2 adjust the vggxa and vggxb pads from ?2 v to 0 v to achieve the total drain current (i dd ) = 800 ma.
admv7810 data sheet rev. 0 | page 4 of 17 absolute maximum ratings table 2. parameter rating drain bias voltage (vdd1a to vdd4a, vdd1b to vdd4b) 4.5 v gate bias voltage (vgg1a to vgg4a, vgg1b to vgg4b) ?3 v to 0 v maximum junction temperature (to maintain 1 million hours mean time to failure (mttf)) 175c operating temperature range ?55c to +85c storage temperature range ?65c to +150c electrostatic discharge (esd) sensitivity human body model (hbm) 250 v stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. thermal resistance thermal performance is directly linked to printed circuit board (pcb) design and operating environment. careful attention to pcb thermal design is required. jc is the junction to case (or die to package) thermal resistance. table 3. thermal resistance package type jc 1 unit c-40-3 24.2 c/w 1 based on the atrox 800ht1v ? as the die attach epoxy. esd caution
data sheet admv7810 rev. 0 | page 5 of 17 pin configuration and fu nction descriptions 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 3 2 1 rfin gnd gnd gnd gnd 20 21 22 rfout 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 vgg1a gnd gnd gnd gnd gnd gnd gnd gnd vdd1a vgg2a vdd2a vgg3a vdd3a vgg4a vdd4a vref vdet vdd4b vgg4b vdd3b vgg3b vdd2b vgg2b vdd1b vgg1b gnd gnd gnd gnd gnd gnd gnd gnd admv7810 top view (not to scale) 16409-002 figure 2. pad configuration table 4. pad function descriptions pad o. nemonic description 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 20, 22, 25, 27, 29, 31, 33, 35, 37, 39 gnd ground connection (see figure 3). 2 rfin rf input. ac-couple rfin and match it to 50 (see figure 4). 4, 8, 12, 16 vgg1a to vgg4a first stage gate bias voltage for the power ampl ifier (see figure 8). for the required external components, see figure 46. 6, 10, 14, 18 vdd1a to vdd4a first stage drain bias voltage for the power amplifier (see figure 5). 21 rfout rf output. ac-couple rfout and match it to 50 (see figure 6). 23 vref reference voltage for the power detector (see figure 7). vref is the dc bias of the diode biased through an external resistor used for tempera ture compensation of vdet. refer to the typical application circuit (see figure 46) for the required external components. 24 vdet detector voltage for the power detector (see figure 7). vdet is the dc voltage representing the rf output power rectified by the diode, which is biased through an external resistor. refer to the typical application circuit (see figure 46) for the required external components. 26, 30, 34, 38 vdd4b to vdd1b second stage drain bias voltage for the power amplifier (see figure 5). 28, 32, 36, 40 vgg4b to vgg1b second stage gate bias voltage for the power ampl ifier (see figure 8). for the required external components, see figure 46. die bottom gnd ground. the die bottom must be connected to the rf/dc ground (see figure 3).
admv7810 data sheet rev. 0 | page 6 of 17 interface schematics g nd 16409-003 figure 3. gnd interface schematic rfin 16409-004 figure 4. rfin interface schematic v dd1a to vdd4a, vdd1b to vdd4b 16409-005 figure 5. vdd1a to vdd4a and vdd1b to vdd4b interface schematic rfout 16409-006 figure 6. rfout in terface schematic vref, vdet 16409-007 figure 7. vref, vdet interface schematic v gg1a to vgg4 a v gg1b to vgg4b 16409-008 figure 8. vgg1a to vgg4a and v gg1b to vgg4b interface schematic
data sheet admv7810 rev. 0 | page 7 of 17 typical performance characteristics 30 ?30 79 88 response (db) frequency (ghz) ?25 ?20 ?15 ?10 ?5 0 5 10 15 20 25 80 81 82 83 84 85 86 87 input return loss output return loss gain 16409-009 figure 9. broadband gain and retu rn loss response vs. frequency, i dd = 800 ma 26 6 81.0 86.0 gain (db) frequency (ghz) 8 10 12 14 16 18 20 22 24 81.582.082.583.083.584.084.585.085.5 t a = +85c t a = +25c t a = ?55c 16409-010 figure 10. gain vs. frequency over various temperatures, i dd = 800 ma 26 6 81.0 86.0 gain (db) frequency (ghz) 8 10 12 14 16 18 20 22 24 81.582.082.583.083.584.084.585.085.5 500ma 600ma 700ma 800ma 900ma 16409-011 figure 11. gain vs. frequency over i dd 0 ?20 input return loss (db) ?18 ?16 ?14 ?12 ?10 ?8 ?6 ?4 ?2 81.0 86.0 frequency (ghz) 81.582.082.583.083.584.084.585.085.5 t a = +85c t a = +25c t a = ?55c 16409-012 figure 12. input return loss vs. frequency over various temperatures, i dd = 800 ma 0 ?5 ?10 ?15 ?20 ?25 ?30 output return loss (db) 81.0 86.0 frequency (ghz) 81.582.082.583.083.584.084.585.085.5 t a = +85c t a = +25c t a = ?55c 16409-013 figure 13. output return loss vs. frequency over various temperatures, i dd = 800 ma ? 30 ?70 reverse isolation (db) ?65 ?60 ?55 ?50 ?45 ?40 ?35 81.0 86.0 frequency (ghz) 81.582.082.583.083.584.084.585.085.5 t a = +85c t a = +25c t a = ?55c 16409-014 figure 14. reverse isolation vs. frequency over various temperatures, i dd = 800 ma
admv7810 data sheet rev. 0 | page 8 of 17 34 20 output p1db (dbm) 22 24 26 28 30 32 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 t a = +85c t a = +25c t a = ?55c 16409-015 figure 15. output p1db vs. frequency over various temperatures, i dd = 800 ma 34 20 p sat (dbm) 22 24 26 28 30 32 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 t a = +85c t a = +25c t a = ?55c 16409-016 figure 16. p sat vs. frequency over various temperatures, i dd = 800 ma 40 20 output ip3 (dbm) 22 24 26 28 30 32 34 36 38 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 t a = +85c t a = +25c t a = ?55c 16409-017 figure 17. output ip3 vs. frequency over various temperatures, i dd = 800 ma, p out /tone = 14 dbm 34 20 output p1db (dbm) 22 24 26 28 30 32 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 500ma 600ma 700ma 800ma 900ma 16409-018 figure 18. output p1db vs. frequency over i dd 34 20 p sat (dbm) 22 24 26 28 30 32 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 500ma 600ma 700ma 800ma 900ma 16409-019 figure 19. p sat vs. frequency over i dd 40 20 output ip3 (dbm) 22 24 26 28 30 32 34 36 38 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 500ma 600ma 700ma 800ma 900ma 16409-020 figure 20. output ip3 vs. frequency over i dd , p out /tone = 14 dbm
data sheet admv7810 rev. 0 | page 9 of 17 40 20 output ip3 (dbm) 22 24 26 28 30 32 34 36 38 81.0 86.0 frequency (ghz) 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 12dbm 14dbm 16dbm 18dbm 20dbm 16409-021 figure 21. output ip3 vs. frequency over p out per tone , i dd = 800 ma 12 20 p out per tone (dbm) 40 20 output ip3 (dbm) 22 24 26 28 30 32 34 36 38 13 14 15 16 17 18 19 500ma 600ma 700ma 800ma 900ma 16409-022 figure 22. output ip3 vs. p out per tone over i dd , rf = 83.5 ghz 40 10 500 900 gain (db), output p1db (dbm), p sat (dbm) drain current (ma) 15 20 25 30 35 600 700 800 gain p1db p sat 16409-023 figure 23. gain, output p1db, and p sat vs. drain current (i dd ), rf = 81 ghz 12 20 p out per tone (dbm) 40 20 output ip3 (dbm) 22 24 26 28 30 32 34 36 38 13 14 15 16 17 18 19 500ma 600ma 700ma 800ma 900ma 16409-024 figure 24. output ip3 vs. p out per tone over i dd , rf = 81 ghz 12 20 p out per tone (dbm) 40 20 output ip3 (dbm) 22 24 26 28 30 32 34 36 38 13 14 15 16 17 18 19 500ma 600ma 700ma 800ma 900ma 16409-025 figure 25. output ip3 vs. p out per tone over i dd , rf = 86 ghz 40 10 500 900 gain (db), output p1db (dbm), p sat (dbm) drain current (ma) 15 20 25 30 35 600 700 800 gain p1db p sat 16409-026 figure 26. gain, output p1db, and p sat vs. drain current (i dd ), rf = 83.5 ghz
admv7810 data sheet rev. 0 | page 10 of 17 40 10 500 900 gain (db), output p1db (dbm), p sat (dbm) drain current (ma) 15 20 25 30 35 600 700 800 gain p1db p sat 16409-027 figure 27. gain, output p1db, and p sat vs. i dd , rf = 86 ghz 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-028 figure 28. gain, p out , pae, and i dd vs. input power, rf = 81 ghz, i dd = 700 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-029 figure 29. gain, p out , pae, and i dd vs. input power, rf = 83.5 ghz, i dd = 700 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-030 figure 30. gain, p out , pae, and i dd vs. input power, rf = 86 ghz, i dd = 700 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-031 figure 31. gain, p out , pae, and i dd vs. input power, rf = 81 ghz, i dd = 800 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-032 figure 32. gain, p out , pae, and i dd vs. input power, rf = 83.5 ghz, i dd = 800 ma
data sheet admv7810 rev. 0 | page 11 of 17 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-033 figure 33. gain, p out , pae, and i dd vs. input power, rf = 86 ghz, i dd = 800 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-034 figure 34. gain, p out , pae, and i dd vs. input power, rf = 81 ghz, i dd = 900 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-035 figure 35. gain, p out , pae, and i dd vs. input power, rf = 83.5 ghz, i dd = 900 ma 30 0 ?15 11 gain (db), p out (dbm), pae (%) input power (dbm) 5 10 15 20 25 1200 600 i dd (ma) 700 800 900 1000 1100 ?13?11?9?7?5?3?113579 p out gain pae i dd 16409-036 figure 36. gain, p out , pae, and i dd vs. input power, rf = 86 ghz, i dd = 900 ma 5.0 0 ?15 11 power dissipation (w) input power (dbm) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 ?13?11?9?7?5?3?113579 81ghz 82ghz 83ghz 84ghz 85ghz 86ghz 16409-037 figure 37. power dissipation vs. input power over various frequencies, i dd = 700 ma, t a = 85c 5.0 0 ?15 11 power dissipation (w) input power (dbm) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 ?13?11?9?7?5?3?113579 81ghz 82ghz 83ghz 84ghz 85ghz 86ghz 16409-038 figure 38. power dissipation vs. input power over various frequencies, i dd = 800 ma, t a = 85c
admv7810 data sheet rev. 0 | page 12 of 17 5.0 0 ?15 11 power dissipation (w) input power (dbm) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 ?13?11?9?7?5?3?113579 81ghz 82ghz 83ghz 84ghz 85ghz 86ghz 16409-039 figure 39. power dissipation vs. input power over various frequencies, i dd = 900 ma, t a = 85c 50 45 40 35 30 25 20 12 20 output imd3 (dbc) p out per tone (dbm) 13 14 15 16 17 18 19 81ghz 82ghz 83ghz 84ghz 85ghz 86ghz 16409-040 figure 40. lower output third-order intermodulation distortion (imd3) vs. p out /tone over various frequencies, i dd = 800 ma 50 45 40 35 30 25 20 12 20 output imd3 (dbc) p out per tone (dbm) 13 14 15 16 17 18 19 81ghz 82ghz 83ghz 84ghz 85ghz 86ghz 16409-041 figure 41. upper output third-order intermodulation distortion (imd3) vs. p out /tone over various frequencies, i dd = 800 ma 10 1 0.1 0.01 ?16 29 output voltage (v) output power (dbm) +85c +25c ?55c ?11 ?6 ?1 4 9 14 19 24 16409-042 figure 42. detector output voltage (v out ) vs. output power over various temperatures, i dd = 800 ma, rf = 81 ghz 10 1 0.1 0.01 ?16 29 output voltage (v) output power (dbm) +85c +25c ?55c ?11?6?1 4 9 141924 16409-043 figure 43. detector output voltage (v out ) vs. output power over various temperatures, i dd = 800 ma, rf = 83.5 ghz 10 1 0.1 0.01 ?16 29 output voltage (v) output power (dbm) +85c +25c ?55c ?11?6?1 4 9 141924 16409-044 figure 44. detector output voltage (v out ) vs. output power over temperatures, i dd = 800 ma, rf = 86 ghz
data sheet admv7810 rev. 0 | page 13 of 17 theory of operation the circuit architecture of the admv7810 power amplifier is shown in figure 45. the admv7810 uses four cascaded gain stages to form an amplifier with a combined gain of 20 db and a saturated output power (p sat ) of 29 dbm. at the output of the last stage, a coupler taps off a small portion of the output signal. the coupled signal is presented to an on-chip diode detector for external monitoring of the output power. a matched reference diode is included to correct detector temperature dependencies. see the application circuit shown in figure 46 for further details on biasing the different blocks and using the detector features. rfin rfout vdet vref 16409-045 figure 45. power amplifier circuit architecture
admv7810 data sheet rev. 0 | page 14 of 17 applications information a typical application circuit for the admv7810 is shown in figure 46. combine supply lines as shown in the application circuit schematic to minimize external component count and simplify power supply routing. the admv7810 uses several amplifier, detector, and attenuator stages. all stages use depletion mode phemt transistors. it is important to follow the following power-up bias sequence to avoid transistor damage. 1. apply a ?2 v bias to the vgg1a to vgg4a and vgg1b to vgg4b pads. 2. apply 4 v to the vdd1a to vdd1b and vdd1b to vdd4b pads. 3. adjust vgg1a to vgg4a and vgg1b to vgg4b between ?2 v and 0 v to achieve a total amplifier drain current of 800 ma. to power down the admv7810, follow the reverse procedure. for additional guidance on general bias sequencing, see the mmic amplifier biasing procedure application note. 4 120pf v gg1a, vgg2a, vgg3a, vgg4 a v gg1b, vgg2b, vgg3b, vgg4b vdd1b, vdd2b, vdd3b, vdd4b 4.7f 0.1f 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 3 2 1 rfin rfin 20 21 22 rfout rfout 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 vgg1a vdd1a vgg2a vdd2a vgg3a vdd3a vgg4a vdd4a vref vdet vdd4b vgg4b vdd3b vgg3b vdd2b vgg2b vdd1b vgg1b 120pf 120pf 120pf 120pf 120pf v out = v ref ? v det 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 0.1f 0.1f 4.7f + + 4.7f v dd1a, vdd2a, vdd3a, vdd4 a 4.7f 0.1f +5v +5v 10k? 10k? ?5v 100k ? suggested interface circuit 10k? 10k? admv7810 16409-046 100k ? figure 46. typical application circuit
data sheet admv7810 rev. 0 | page 15 of 17 assembly diagram 16409-047 4.7f 4.7f 3mil wide gold ribbon (wedge bond) 6mil nominal gap 4567891011121314151617 1819 3 2 1 rfin 20 21 22 rfout 23242526 27 28 293031 32333435363738 39 40 vgg1a vdd1a vgg2a vdd2a vgg3a vdd3a vgg4a vdd4a vref vdet vdd4b vgg4b vdd3b vgg3b vdd2b vgg2b vdd1b vgg1b admv7810 50 ? transmission line 3mil wide gold ribbon (wedge bond) 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 120pf 0.1f 0.1f 0.1f 0.1f figure 47. assembly diagram
admv7810 data sheet rev. 0 | page 16 of 17 mounting and bonding techniques for millimeterwave gaas mmics attach the die directly to the ground plane eutectically or with conductive epoxy. to bring rf to and from the chip, use 50 microstrip trans- mission lines on 0.127 mm (5 mil) thick alumina thin film substrates (see figure 48). rf ground plane 0.05mm (0.002") thick gaas mmic ribbon bond 0.127mm (0.005") thick alumina thin film substrate 0.076mm (0.003") 16409-048 figure 48. routing rf signals to minimize bond wire length, place microstrip substrates as close to the die as possible. typical die to substrate spacing is 0.076 mm to 0.152 mm (3 mil to 6 mil). handling precautions to avoid permanent damage, adhere to the following precautions. storage all bare die ship in either waffle or gel-based esd protective containers, sealed in an esd protective bag. after opening the sealed esd protective bag, all die must be stored in a dry nitrogen environment. cleanliness handle the chips in a clean environment. never use liquid cleaning systems to clean the chip. static sensitivity follow esd precautions to protect against esd strikes. transients suppress instrument and bias supply transients while bias is applied. to minimize inductive pickup, use shielded signal and bias cables. general handling handle the chip on the edges only using a vacuum collet or with a sharp pair of bent tweezers. because the surface of the chip has fragile air bridges, never touch the surface of the chip with a vacuum collet, tweezers, or fingers. mounting the chip is back metallized and can be die mounted with gold/tin (ausn) eutectic preforms or with electrically conductive epoxy. the mounting surface must be clean and flat. eutectic die attach it is best to use an 80% au/20% sn preform with a work surface temperature of 255c and a tool temperature of 265c. when hot 90% nitrogen/10% hydrogen gas is applied, maintain tool tip temperature at 290c. do not expose the chip to a temperature greater than 320c for more than 20 sec. no more than 3 sec of scrubbing is required for attachment. epoxy die attach the atrox 800ht1v is recommended for die attachment. apply a minimum amount of epoxy to the mounting surface so that a thin epoxy fillet is observed around the perimeter of the chip after placing it into position. cure the epoxy per the schedule provided by the manufacturer. wire bonding rf bonds made with 3 mil 0.5 mil gold ribbon are recom- mended for the rf ports. these bonds must be thermosonically bonded with a force of 40 g to 60 g. dc bonds of 1 mil (0.025 mm) diameter, thermosonically bonded, are recommended. create ball bonds with a force of 40 g to 50 g and wedge bonds with a force of 18 g to 22 g. create all bonds with a nominal stage temperature of 150c. apply a minimum amount of ultrasonic energy to achieve reliable bonds. keep all bonds as short as possible, less than 12 mil (0.31 mm).
data sheet admv7810 rev. 0 | page 17 of 17 outline dimensions 11-15-2017-a 2.999 3.799 0.613 0.130 0.130 0.09 1.457 1.140 1.457 1.288 0.232 0.163 1.071 0.103 0.161 top view (circuit side) 0.05 side view m5601 1 2 3 456 7 8 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 2728 293031 32 33 34 35 3637 3839 40 0.130 0.130 0.305 0.199 0.127 0.087 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.20 0.201 0.201 0.199 figure 49. 40-pad bare die [chip] (c-40-3) dimensions shown in millimeters ordering guide model 1 temperature range package description package option 2 ADMV7810CHIPS ?55c to +85c 40-pad bare die [chip] c-40-3 admv7810-sx ?55c to +85c 40-pad bare die [chip] c-40-3 1 the admv7810-sx consists of two pairs of the die in a ge l pack for sample orders. 2 this is a waffle pack option; contact analog devices, inc., sales representatives for additional packaging options. ?2018 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d16409-0-3/18(0)

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